New Processor Will Have 100 Cores!  | | |
October 26th, 2009, 05:56 PM
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#1 (permalink)
| | Pump you sucker! Pump!
Join Date: Oct 2001 Location: Sacto, Colliefornia
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| New Processor Will Have 100 Cores! New Processor Will Feature 100 Cores | Gadget Lab | Wired.com
I want one. Quote: |
Forget dual-core and quad-core processors: A semiconductor company promises to pack 100 cores into a processor that can be used in applications that require hefty computing punch, like video conferencing, wireless base stations and networking. By comparison, Intel’s latest chips are expected to have just eight cores.
| Geeze... why waste your money on Intel's measly eight cores?
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October 26th, 2009, 08:04 PM
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#2 (permalink)
| | THE Gimp Clown Fish!
Join Date: Jun 2007 Location: Bay Area
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October 26th, 2009, 08:21 PM
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#3 (permalink)
| | SoMuchAnime-SoLittleTime
Join Date: Aug 2003 Location: Plymouth, WI
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And just what would you do with that?
It's very unlikely that it'll run any desktop application, and certainly not Windows. |
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October 26th, 2009, 08:29 PM
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#4 (permalink)
| | Ultimate Member
Join Date: Nov 2006 Location: Bexhill, UK
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| Quote:
Originally Posted by Chuckiechan | Depends how they will compare with a core v core comparrison.....
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October 26th, 2009, 08:41 PM
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#5 (permalink)
| | Anime Otaku
Join Date: Oct 2001 Location: Tampa, FL USA
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Core count and bandwidth are nice, but the problem of SMP code parallelization remains. If the code does not intrinsically exploit parallelism, you are left with underutilized hardware resources, which is the current problem with mainstream computing. Sure, if you have the right workload and enough development resources, efficient SMP utilization is more of a concern than a roadblock. Then again, you are typically looking at academic and enterprise roles for such workloads - hardly mainstream computing.
Accordingly, viable software development is the underlying issue of interest. There have been concerns about the software model implemented by Tilera's TILE64 architecture. Unless it breaks from existing SMP programming conventions, TILE64 could become yet another SMP-targeted architecture best suited for niche-market computing roles, IMO of course.
Anyway, I welcome the effort from a hardware design perspective, and I look forward to seeing its real-world capabilities. In particular, I would like to see its streaming workload efficiency and performance, such as for real-time video encoding.
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October 26th, 2009, 08:49 PM
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#6 (permalink)
| | Anime Otaku
Join Date: Oct 2001 Location: Tampa, FL USA
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| Quote:
Originally Posted by EXreaction And just what would you do with that?
It's very unlikely that it'll run any desktop application, and certainly not Windows. | It is a RISC-based architecture. AFAIK, it currently uses (will use?) a SMP-capable port of Linux as a runtime environment.
Porting existing applications might be straightforward given the POSIX nature of Linux, but performance could be another aspect altogether. Just because you can cross compile with minimal effort, it does not mean the derivative software will perform similarly on another platform.
Case in point, I run a dual-proc Itanium 2 box as my primary desktop. It runs Debian Linux fine, and I have access to thousands of ported applications via cross compilation. However, few of those typically CISC- and RISC-targeted applications are actually ever optimized for an EPIC/VLIW architecture when porting, so they oftentimes run with sub-optimal performance compared to similar applications developed and/or ported with EPIC/VLIW in mind. |
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October 27th, 2009, 04:07 PM
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#7 (permalink)
| | THE Gimp Clown Fish!
Join Date: Jun 2007 Location: Bay Area
Posts: 3,857
| Quote:
Originally Posted by RobRich Core count and bandwidth are nice, but the problem of SMP code parallelization remains. If the code does not intrinsically exploit parallelism, you are left with underutilized hardware resources, which is the current problem with mainstream computing. Sure, if you have the right workload and enough development resources, efficient SMP utilization is more of a concern than a roadblock. Then again, you are typically looking at academic and enterprise roles for such workloads - hardly mainstream computing.
Accordingly, viable software development is the underlying issue of interest. There have been concerns about the software model implemented by Tilera's TILE64 architecture. Unless it breaks from existing SMP programming conventions, TILE64 could become yet another SMP-targeted architecture best suited for niche-market computing roles, IMO of course.
Anyway, I welcome the effort from a hardware design perspective, and I look forward to seeing its real-world capabilities. In particular, I would like to see its streaming workload efficiency and performance, such as for real-time video encoding. | This reminds me of an article I read some time ago, when dual cores were becoming mainstream and quad-cores were on the horizon. The idea of coding a program, in this case it was games for some C&C type game that escapes me, to truely take advantage of each core was the big problem. Everyone knows how to program for a single core but its a whole new world when your taking into account utilizing multi-core environments.
We have barely passable support for multi-core programming now, a few years later and were pushing the 8-core CPU as the main stream without even giving time to allow for main stream apps to catch up with quad-core. I have a feeling that until the level of education in programming catches up with the multi-core world, anything beyond dual and quad will be outside the norm for programming. |
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October 27th, 2009, 09:10 PM
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#8 (permalink)
| | Member
Join Date: Sep 2008 Location: Black Force Domain
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Originally Posted by nemowolf We have barely passable support for multi-core programming now, a few years later and were pushing the 8-core CPU as the main stream without even giving time to allow for main stream apps to catch up with quad-core. I have a feeling that until the level of education in programming catches up with the multi-core world, anything beyond dual and quad will be outside the norm for programming. | This reminds me about the Intel vs. Nvidia fight on parrallel processing, Doesn't mean a thing unless the programming takes advantage of it.
Last edited by Horrorcosmic : October 27th, 2009 at 09:13 PM.
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October 28th, 2009, 09:56 AM
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#9 (permalink)
| | Anime Otaku
Join Date: Oct 2001 Location: Tampa, FL USA
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Exactly. If a company wants to capitalize upon multi-core SMP, especially for a new architecture, the associated software development tools can make or break the effort at this point.
Multi-proc scaling is becoming a serious problem, even for consumer-oriented x86 hardware. The Intel Ct project is taking a step towards addressing the parallel processing issue, but even with such technologies becoming available, programmers should still be looking towards new coding approaches for mainstream software. Intel is already telling software developers to think about utilizing thousands of cores. |
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October 28th, 2009, 05:41 PM
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#10 (permalink)
| | Member
Join Date: Sep 2008 Location: Black Force Domain
Posts: 206
| Quote:
Originally Posted by RobRich Exactly. If a company wants to capitalize upon multi-core SMP, especially for a new architecture, the associated software development tools can make or break the effort at this point.
Multi-proc scaling is becoming a serious problem, even for consumer-oriented x86 hardware. The Intel Ct project is taking a step towards addressing the parallel processing issue, but even with such technologies becoming available, programmers should still be looking towards new coding approaches for mainstream software. Intel is already telling software developers to think about utilizing thousands of cores. |
This is the same exact problem Sony is having with the Playstation 3, no body see's its potential because most games are carried over from Xbox which from a development view is alot like a computer and those games are not developed on a cellchip (SMP processor).
This is just a 100 core Cellchip. |
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